Some integrated circuits with n-channel metal oxide semiconductor (NMOS) transistors are fabricated with boron halo implants to reduce short-channel effects. As gate lengths have shrunk below 65 nanometers, boron diffusion from the halo implants has produced undesirable effects including threshold mismatch between transistors. Carbon co-implantation in NMOS transistors is used to control boron diffusion, thus to improve the threshold mismatch which is critical for memory yield. However, carbon implantation aggravates band-to-band tunneling which increases gate-induced drain leakage (GIDL) and also increased gate leakage both of which in turn increases product power consumption. Achieving desired levels of threshold mismatch and power consumption has been problematic.